Резюме: FPGA engineer (Львів)

Досвід роботи

• FPGA engineer Miltech <p><strong>Ultra low light analog mini camera for FPV drones</strong></p>
  <p><strong>•</strong> Developed FW for <strong>Intel MAX10 FPGA: </strong>interfaces image sensor ↔ FPGA, FPGA → video encoder : I²C, SERDES; real-time image processing pipelines:<br /></p>
  <p><strong>•</strong> Used design software: <strong>Intel Quartus Prime, Altium Designer, Matlab/Simulink</strong><strong> (at the algorithms development stage).</strong></p>
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• FPGA engineer ITSys <p><strong>GigE machine vision camera for ITS application</strong></p>
  <p><strong>•</strong> <strong>Developed part of FW for </strong><strong>Xilinx Spartan 7 FPGA</strong><strong> for real-time image processing pipelines (gain/offset correction, noise reduction, HDR, detail enhancement, multi-exposure fusion) and synchronization.</strong><br /></p>
  <p><strong>• </strong>Collaborated with FW developer of GigE interface and SW developer of final embedded PC-based ITS system to optimize architecture and performance.</p>
  <p>•<strong> Used design software: </strong><strong>Xilinx Vivado IDE</strong><strong>.</strong></p>
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• HW team lead Avidis <p><strong>Multi-channel CVBS Video capture boards (PCI/PCIe </strong><strong>&gt;</strong><strong>10 models)</strong></p>
  <p><strong>•</strong> <strong>Led a team of HW engineers to achieve target BOM cost and performance for full range of video capture boards (PCI, PCIe x1, PCIe x4, mini PCI).</strong><br /></p>
  <p><strong>•</strong> <strong>Developed FW for </strong><strong>Altera Cyclone III FPGA: </strong> PCI 33Mhz Master/Target IP core, PCI 66Mhz Master/Target IP core, I<strong>²C bus controller IP core, </strong>on-board image processing pipelines.</p>
  <p><strong>•</strong> Collaborated with team of SW developers to design and optimize performance of final PC-based CCTV system.</p>
  <p><strong>•</strong> Used design software: <strong>Altera Quartus II, Modelsim</strong><strong>.</strong></p>